Sign in
12thPass logo
New chatPYQ LibraryDoubtsRank report
Sign in to see Recents

Your guest activity stays on this device

Sign in to save progress →
Sign in

Electronic Devices question

2016 · Shift 0 · Q39
Guest · filters and generic practice availableBrowsing as a guest · PYQ filters and generic practice are available. Sign in only for personalised features and saved progress.
  1. PYQ Library
  2. /JEE Main
  3. /Physics
  4. /Electronic Devices
  5. /2016 · Shift 0 · Q39

Electronic Devices question

2016 · Shift 0 · Q39

JEE MainPhysicsElectronic DevicesMCQ+4 / −1
If a,b,c,da, b, c, da,b,c,d are inputs to a gate and xxx is its output, then, as per the following time graph, the gate is : JEE Main 2016 (Offline) Physics - Semiconductor Question 190 English
  1. A
    OROROR
  2. B
    NANDNANDNAND
  3. C
    NOTNOTNOT
  4. D
    ANDANDAND
View written solutionFree

Correct answer: A

The question refers to a time graph of inputs a,b,c,da,b,c,da,b,c,d and output xxx, and asks to identify the gate.

However, the actual time graph is not provided in the prompt. Without that waveform diagram, it is not possible to independently determine whether the gate is OROROR, ANDANDAND, NANDNANDNAND, or NOTNOTNOT.

What would be needed

To identify the gate, we would compare the output xxx with the inputs over time:

  1. OR gate: x=a+b+c+dx = a + b + c + dx=a+b+c+d Output is HIGH whenever at least one input is HIGH.

  2. AND gate: x=a⋅b⋅c⋅dx = a \cdot b \cdot c \cdot dx=a⋅b⋅c⋅d Output is HIGH only when all inputs are HIGH simultaneously.

  3. NAND gate: x=a⋅b⋅c⋅d‾x = \overline{a \cdot b \cdot c \cdot d}x=a⋅b⋅c⋅d Output is LOW only when all inputs are HIGH.

  4. NOT gate: A NOT gate has only one input, so it is incompatible with four inputs a,b,c,da,b,c,da,b,c,d.

Elimination

  • Option CCC (NOTNOTNOT) is not possible because there are four inputs.
  • The actual distinction among OROROR, ANDANDAND, and NANDNANDNAND depends entirely on the missing waveform.

Using the stored answer

Since the waveform is absent, I cannot fully verify from first principles. But if the stored correct answer is AAA, then the gate is: OR\boxed{OR}OR​

This would mean the output xxx goes HIGH whenever any one of a,b,c,a,b,c,a,b,c, or ddd is HIGH, matching the usual behavior of an OR gate.

PreviousNext

More from Electronic Devices

  • The temperature dependence of resistance of Cu and undoped Si in the temperature range 300−400K, is best described by :2016 · MCQ
  • A red LED emits light at 0.1 watt uniformly around it. The amplitude of the electric field of the light at a distance of 1m from the diode is :2015 · MCQ
  • The current voltage relation of diode is given by I=(e100V/T−1)mA, where the applied voltage V is in volts and the temperature T is in degree kelvin. If a student makes an error measuring ±0.01V…2014 · MCQ
  • The forward biased diode connection is:2014 · MCQ
  • The I-V characteristic of an LED is2013 · MCQ
  • A diode detector is used to detect an amplitude modulated wave of 60% modulation by using a condenser of capacity 250 picofarad in parallel with a load resistance 100 kilo ohm. Find the maximum modulated frequency which could be… Includes diagram2013 · MCQ
  • Truth table for system of four NAND gates as shown in figure is: Includes diagram2012 · MCQ
  • The combination of gates shown below yields Includes diagram2010 · MCQ